{"kind":"task","effective_mode":"full","benchmark":{"kind":"benchmark","effective_mode":"full","slug":"mmlu","formal_name":"MMLU","introduction":"MMLU asks four-way multiple-choice questions across 57 subjects, from elementary material to professional-level examinations. Since 2020 it has been the most widely cited single reference point for general capability.","introduction_ja":"","introduction_en":"","category":"Category not supplied","task_count":null,"acquisition_status":"Acquisition status not supplied","official_url":"https://github.com/hendrycks/test","indexing_mode":"index","profile":{"resources":[],"task_format":"","scoring":"","metric":"","size":"","answer_access":"","license":"","citation":"","maintainer":"","released":"","why_hard":"","related":[],"history":"","construction":"","limitations":"","saturation":"","scores":[]}},"task_id":"41051877-f2e6-5961-9348-0bae1045f3d0","task_key":"all--test--41051877-f2e6-5961-9348-0bae1045f3d0","task_revision_id":"1","upstream_id":"","short_description":"The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an…","config":"all","split":"test","body":"{\"choices\":\"['T1 & T2', 'T2 & T3', 'T3 & T4', 'T4 & T1']\",\"question\":\"The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between\",\"subject\":\"electrical_engineering\"}","display_format":"text","language":"","answer_status":"published","assets":[],"source_url":"https://github.com/hendrycks/test","history":"initial import","indexing_mode":"index","subproblems":[],"grids":[]}