{"kind":"task","effective_mode":"full","benchmark":{"kind":"benchmark","effective_mode":"full","slug":"mmlu-pro","formal_name":"MMLU-Pro","introduction":"MMLU-Pro rebuilds MMLU with ten answer options instead of four and removes items that no longer separate models. Questions span fourteen academic and professional subjects.","introduction_ja":"","introduction_en":"","category":"Category not supplied","task_count":null,"acquisition_status":"Acquisition status not supplied","official_url":"https://huggingface.co/datasets/TIGER-Lab/MMLU-Pro","indexing_mode":"index","profile":{"resources":[],"task_format":"","scoring":"","metric":"","size":"","answer_access":"","license":"","citation":"","maintainer":"","released":"","why_hard":"","related":[],"history":"","construction":"","limitations":"","saturation":"","scores":[]}},"task_id":"848b1d67-c000-5d18-9d69-4dab829cf492","task_key":"default--test--11966","task_revision_id":"1","upstream_id":"11966","short_description":"A combinational PLD with a fixed AND array and a programmable OR array is called…","config":"default","split":"test","body":"{\"category\":\"engineering\",\"options\":\"['ROM', 'FPGA', 'PLA', 'PLD', 'EEPROM', 'PAL', 'RAM', 'PROM', 'CPLD', 'ASIC']\",\"question\":\"A combinational PLD with a fixed AND array and a programmable OR array is called a\",\"src\":\"ori_mmlu-electrical_engineering\"}","display_format":"text","language":"","answer_status":"published","assets":[],"source_url":"https://huggingface.co/datasets/TIGER-Lab/MMLU-Pro","history":"initial import","indexing_mode":"index","subproblems":[],"grids":[]}